Artix 7 FPGA Motor Drive FPGA kit top view with 20x4 LCD, Switch, LED, Push button, power switch/led, reset button.
Artix 7 FPGA Motor Drive FPGA kit top view with 20x4 LCD, Switch, LED, Push button, power switch/led, reset button.
Artix 7 FPGA Motor Drive FPGA kit side with Bipolar ADC, WIFI, Bluetooth, GPIO, power In and USB JTAG / UART
Artix 7 FPGA Motor Drive FPGA kit side view with 5v I/O and USB communication interface
Artix 7 FPGA Motor Drive FPGA kit side view of Unipolar ADC and DAC

EDGE Artix 7 200T FPGA Motor (Inverter) PWM Controller

₹ 80,000

Product Includes

  • EDGE Artix 7 200T FPGA Motor / Inverter PWM Controller
  • USB Cable
  • 12v DC Adaptor

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SKU: EDGE_ARTIX_200T Category: Tags: , Brand: , ,

Description

EDGE Artix 7 200T FPGA Motor / Inverter PWM Controller features the most powerful and high-density FPGA from Xilinx Artix 7 FPGA family.  It contains XC7A200T FPGA with logic cells of 215,360, which is 6.5 times more logic elements than our mid-level XC7A35T FPGA board, 740 high-performance digital signal processing (DSP) slices that can tackle compute-intensive functions such as PID Controller, Clark/Park transforms, and Space Vector PWM.

EDGE Artix 7 200T FPGA Motor / Inverter PWM Controller includes all the important features to implement motor drive applications such as Isolated onboard power module, Isolated USB UART, 16-channel bipolar ADC with an operating range of -10v to +10v, 8-channel unipolar ADC, 8-channel DAC, USB 2.0 communication which can send high-Speed data to PC, 64 no of 5v I/O, 36 no of 3.3v I/O, 20x4 LCD, USB JTAG, 50MHz onboard clock which can be multiplied up to 400MHz, 8 SPDT Switch, 8 LED and 4 Push Buttons.  Also includes Wi-Fi/Bluetooth module. So, all the feedback and sensor data from the motor drive applications can be monitored from the cloud (IoT) through Wi-Fi or it can be remotely controlled through Bluetooth.

EDGE Artix 7 Motor / Inverter PWM Controller Board’s power of programmability gives industrial automation designers a highly efficient to traditional motor control units (MCUs). The parallel-processing power, fast computational speeds, and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control (FOC).

Product Block Diagram

ARTIX 7 FPGA Motor Drive kit block diagram

Package Includes

  • EDGE Artix 7 200T FPGA Motor /Inverter PWM Controller
  • USB Cable
  • 12v DC Power Supply

Product documents

Product Applications

  • Motor Drives
  • IoT (Internet of Things)
  • Data Acquisition
  • Product Prototyping
  • Control Systems
  • Power Drives

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    Additional information

    FPGA

    Artix 7 XC7A200T FPGA
    • 215360 logic cells, 13455360 BRAM bits
    • 740 DSP48 slices for computing DSP algorithms
    • 10 clock management blocks for PLL and DCM.
    USB JTAG

    Onboard USB JTAG for programming
    Fully Compatible with Xilinx Vivado Design Suite and ISE
    USB UART

    Isolated USB UART
    USB Communication

    USB 2.0 High Speed Communication
    Power

    Onboard Isolated Power
    SPI FLASH

    128Mb FLASH Memory
    wireless communication

    WIFI/Bluetooth for wireless communication
    Slide Switch

    8 SPDT Slide Switch for user input selection
    LED

    8 LED for user output
    Push Button

    4 Push Button for User Input
    1 Push Button for Reset
    LCD

    20X4 LCD
    Clock

    50 MHz Clock
    Bipolar ADC

    Bipolar SPI ADC
    • No of ADC input: 16 Channels
    • Resolution: 16 bit
    • Sampling rate: 1MSPS
    • Analog input range: ±10V(*BIPOLAR)
    • 20-pin headers for ADC input.
    Unipolar ADC

    Unipolar SPI ADC
    • No of ADC input: 8 Channels
    • Resolution: 12 bit
    • Sampling rate: 1MSPS
    • Analog input range: 0 – 3.3V
    • 10-pin PTB connector for ADC input.
    DAC

    SPI DAC
    • No of DAC output: 8 Channels
    • Resolution: 12 bit
    • 10-pin PTB connector for DAC output
    I/O Connector

    100 I/O
    • 2 no’s of 40 pin headers for PWM Outputs and Capture
    • Inputs – 64 I/O’s (5v range)
    • 40 pin headers for GPIO line termination – 36 I/O’s (3v3 range)

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