Block RAM and Distributed RAM in Xilinx FPGA

July 4, 2020October 21, 2014 by Support Team

Block RAM:
Xilinx FPGA Consist of 2 columns of memory called Block RAM or BRAM.
It is a Dual port memory with separate Read/Write port.
It can be configured as different data width 16Kx1, 8Kx8, 4Kx4 and so on.
BRAM can be excellent for FIFO implementation.

Block RAM and Distributed RAM in Xilinx FPGA

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