Tutorial 1: Binary Counter FPGA Implementation

In this tutorial, We implemented 4 bit binary counter using EDGE Spartan 6 FPGA Kit. It counts at every 0.5 sec. We already designed 4 bit Binary counter for simulation which counts at input clock frequency (20 ns). As a result we can’t visually differentiate the counting sequence with on-board LEDs as it is counting … Read more Tutorial 1: Binary Counter FPGA Implementation

Introducing EDGE Spartan 6 FPGA Development Board!

EDGE Spartan 6 FPGA Development Board 07

All About FPGA brings you a feature rich development board for FPGA learners community. EDGE Spartan 6 FPGA Development board is the feature rich development board with Spartan 6 FPGA, SPI FLASH, ADC, DAC, LCD, 7 segment Display, Stereo Jack, VGA, PS2, WiFi, Bluetooth. The Board also provides additional interface like CMOS Camera and TFT … Read more Introducing EDGE Spartan 6 FPGA Development Board!

Synchronous and Asynchronous Reset VHDL

Reset Circuit helps to keep the FPGA in to Known State. There are 2 types Resets commonly employed to Reset FPGA. They are Asynchronous and Synchronous Reset.

Asynchronous Reset
Asynchronous Reset circuit is independent of free running clock. Which means Reset circuit got no knowledge of Clock input. It can assert and desert a flipflop asynchronously.

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