Sequence Detector using Mealy and Moore State Machine VHDL Codes

Mealy State Machine
The Output of the state machine depends on both present state and current input. When the input changes,the output of the state machine updated without waiting for change in clock input.
Moore State Machine
The Output of the State machine depends only on present state. The output of state machine are only updated at the clock edge.

Flat 10% OFF on all the EDGE FPGA kits. Now Shipping. Coupon Code: STAY@HOME

×